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Chip multi-processor scalability for single-threaded applications.
Neil Vachharajani
Matthew Iyer
Chinmay Ashok
Manish Vachharajani
David I. August
Daniel A. Connors
Published in:
SIGARCH Comput. Archit. News (2005)
Keyphrases
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multi processor
multithreading
program execution
network on chip
high speed
shared memory
single processor
multi core processors
low cost
real time
image segmentation
lower bound
graph cuts
distributed memory