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A high speed graphics DRAM with low power and low noise data bus inversion in 54nm CMOS.
Seung-Wook Kwack
Kae-Dal Kwack
Published in:
IEICE Electron. Express (2009)
Keyphrases
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high speed
low power
cmos technology
low cost
power consumption
low power consumption
vlsi circuits
signal processing
database management systems
digital camera
single chip