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High Performance, Low Cost, and Robust Soft Error Tolerant Latch Designs for Nanoscale CMOS Technology.
Haiqing Nan
Ken Choi
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2012)
Keyphrases
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low power
low cost
error tolerant
cmos technology
power consumption
flip flops
single chip
high speed
digital signal processing
graph matching
hardware and software
embedded dram
digital camera
low voltage
silicon on insulator
real time
association patterns