A 40 Gb/s PAM4 SerDes Receiver in 65nm CMOS Technology.

Weifeng Fu Qingsheng Hu Rong Wang

Published in: CCECE (2018)

Keyphrases

cmos technology
low power
high speed
spl times
low voltage
parallel processing
power consumption
low cost
image sensor
mixed signal
silicon on insulator
power dissipation
real time
digital images
super resolution