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Transformation of Function Block Diagrams to UPPAAL timed automata for the verification of safety applications.
Doaa Soliman
Kleanthis Thramboulidis
Georg Frey
Published in:
Annu. Rev. Control. (2012)
Keyphrases
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timed automata
model checking
reachability analysis
temporal logic
model checker
formal verification
formal specification
verification method
theorem proving
formal methods
theorem prover
asynchronous circuits
real time
real time systems
linear transformation
block size
control strategy
first order logic