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Highly Reliable Reference Bitline Bias Designs for 64 Mb and 128 Mb Chain FeRAMs.
Ryu Ogiwara
Daisaburo Takashima
Sumiko M. Doumae
Shinichiro Shiratake
Ryosuke Takizawa
Hidehiro Shiga
Published in:
IEEE J. Solid State Circuits (2015)
Keyphrases
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highly reliable
times faster
inter frame
data mining
hard disk
real time
neural network
data structure
multiresolution
motion estimation