A 1.8-V 67mW 10-bit 100MSPS pipelined ADC using time-shifted CDS technique.

Jipeng Li Un-Ku Moon

Published in: CICC (2003)

Keyphrases

analog to digital converter
power consumption
hd video
instruction set architecture
power plant
data flow
computational complexity
linear array
data sets
genetic algorithm
database systems
motion estimation
fuzzy logic
parallel processing
single chip