Datapath and Compiler Integration of Coarse-grain Reconfigurable XPP-Arrays into Pipelined RISC Processors.
Jürgen BeckerAlexander ThomasMaik ScheerPublished in: VLSI-SOC (2003)
Keyphrases
- coarse grain
- fine grain
- parallel computation
- multithreading
- instruction set
- distributed memory
- instruction set architecture
- parallel architecture
- parallel algorithm
- parallel programming
- application specific
- linear array
- parallel processing
- parallel computing
- shared memory
- general purpose
- computational power
- software systems
- reconfigurable hardware
- data partitioning
- multi core processors
- efficient implementation
- floating point
- instruction scheduling
- parallel implementation