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Using Floating Gate and Quasi-Floating Gate Techniques for Rail-to-Rail Tunable CMOS Transconductor Design.

José María Algueta-MiguelAntonio J. López-MartínLucía AcostaJaime Ramírez-AnguloRamón González Carvajal
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2011)
Keyphrases
  • floating gate
  • circuit design
  • high speed
  • neural network
  • learning rate