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Deep-Learning-Based Pre-Layout Parasitic Capacitance Prediction on SRAM Designs.
Shan Shen
Dingcheng Yang
Yuyang Xie
Chunyan Pei
Bei Yu
Wenjian Yu
Published in:
ACM Great Lakes Symposium on VLSI (2024)
Keyphrases
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deep learning
unsupervised feature learning
unsupervised learning
machine learning
low power
high speed
power consumption
deep architectures
restricted boltzmann machine
mental models
weakly supervised
decision trees