A Parameterized and Minimal Resource Soft Processor for Programmable Logic.

Christopher L. Felton Barry K. Gilbert Clifton R. Haider

Published in: ACSSC (2019)

Keyphrases

programmable logic
field programmable gate array
resource allocation
artificial intelligence
high speed
parallel processing
resource constraints
neural network
general purpose
information resources
distributed memory
pairwise
probabilistic model
higher order
graphical models
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