A pure hardware k-SAT solver architecture for FPGA based on generic tree-search.
Khadija BousmarFabrice MonteiroZineb HabbasSofiène DellagiAbbas DandachePublished in: ICM (2017)
Keyphrases
- tree search
- sat solvers
- hardware architecture
- search tree
- hardware implementation
- hardware design
- branch and bound
- search space
- orders of magnitude
- field programmable gate array
- constraint propagation
- sat solving
- constraint satisfaction
- search algorithm
- sat problem
- max sat
- iterative deepening
- boolean satisfiability
- search strategies
- mathematical programming
- sat instances
- lower bound
- state space
- stochastic local search
- path finding
- boolean formula
- branch and bound algorithm
- associative memory
- information retrieval
- simulated annealing
- constraint satisfaction problems
- heuristic search