A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications.
Ehsan Zhian TabasyAyman ShafikKeytaek LeeSebastian HoyosSamuel PalermoPublished in: IEEE J. Solid State Circuits (2014)
Keyphrases
- low overhead
- decision feedback
- multipath
- load balancing
- high reliability
- error propagation
- soft decision
- shared memory
- communication cost
- energy efficient
- sar images
- synthetic aperture radar
- analog to digital converter
- embedded systems
- wireless networks
- low cost
- bit error rate
- received signal
- scheduling algorithm
- signal to noise ratio
- end to end
- multi dimensional
- bayesian networks
- distributed breakout
- real time