An analog on-chip learning circuit architecture of the weight perturbation algorithm.
Francesco DiotaleviMaurizio ValleGian Marco BoEzio BiglieriDaniele D. CavigliaPublished in: ISCAS (2000)
Keyphrases
- learning algorithm
- analog vlsi
- weight update
- preprocessing
- vlsi implementation
- objective function
- learning process
- detection algorithm
- optimal solution
- hardware implementation
- computational complexity
- convergence rate
- cost function
- circuit design
- active learning
- worst case
- np hard
- learning phase
- vlsi architecture
- real time