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Low-voltage wide-swing fully differential CMOS voltage buffer.

Juan M. CarrilloMiguel Angel DomínguezJ. Francisco Duque-CarrilloGuido Torelli
Published in: ECCTD (2011)
Keyphrases
  • low voltage
  • power line
  • design considerations
  • random access memory
  • power management
  • cmos technology
  • response time