An 8.5 mW Continuous-Time ΔΣ Modulator With 25 MHz Bandwidth Using Digital Background DAC Linearization to Achieve 63.5 dB SNDR and 81 dB SFDR.
John G. KauffmanPascal WitteJoachim BeckerMaurits OrtmannsPublished in: IEEE J. Solid State Circuits (2011)