A 13-ENOB, 5 MHz BW, 3.16 mW multi-bit continuous-time ΔΣ ADC in 28 nm CMOS with excess-loop-delay compensation embedded in SAR quantizer.
Guowen WeiPradeep ShettigarFeng SuXinyu YuTom KwanPublished in: VLSIC (2015)
Keyphrases
- nm technology
- power consumption
- power dissipation
- cmos technology
- low power
- analog to digital converter
- high speed
- low voltage
- flip flops
- hd video
- coding scheme
- vector quantization
- low cost
- clock frequency
- single chip
- power supply
- step size
- embedded systems
- image reconstruction
- markov chain
- mixed signal
- random access memory
- image coding
- parallel processing