An Asynchronous Low-Power High-Performance Sequential Decoder Implemented With QDI Templates.
Recep O. OzdagPeter A. BeerelPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2006)
Keyphrases
- low power
- power consumption
- low power consumption
- low cost
- high speed
- signal processor
- delay insensitive
- single chip
- wireless transmission
- digital signal processing
- logic circuits
- low complexity
- cmos technology
- high power
- vlsi circuits
- low density parity check
- vlsi architecture
- image sensor
- gate array
- ultra low power
- power reduction
- error correction
- embedded systems