An Energy-Efficient Design-Time Scheduler for FPGAs Leveraging Dynamic Frequency Scaling Emulation (Abstract Only).

Wei Ting Loke Chin Yang Koay

Published in: FPGA (2017)

Keyphrases

neural network
case study
dynamic environments
computer aided
knowledge based systems
higher level
building blocks
software architecture
real time
low level
response time
end to end
design decisions
design tools
design space