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Efficient routing table minimization for fault-tolerant irregular Network-on-Chip.
Rafael Goncalves Mota
Jarbas Silveira
Jardel Silveira
Lucas Brahm
Avelino F. Zorzo
Filipo Novo Mor
César A. M. Marcon
Published in:
ICECS (2016)
Keyphrases
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fault tolerant
network on chip
interconnection networks
fault tolerance
routing algorithm
distributed systems
network simulator
database
load balancing
data transfer
multi processor
multimedia
wireless sensor networks
sensor data
multistage