Power and area optimization by reorganizing CMOS complex gate circuits.
M. TachibanaS. KurosawaR. NojimaNorman KojimaMasaaki YamadaTakashi MitsuhashiNobuyuki GotoPublished in: ISLPD (1995)
Keyphrases
- cmos technology
- power consumption
- power dissipation
- low power
- optimization algorithm
- high speed
- circuit design
- chip design
- analog vlsi
- delay insensitive
- low cost
- global optimization
- real time
- power management
- optimization problems
- power reduction
- nm technology
- optimization methods
- combinatorial optimization
- optimization method
- neural network