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A Hybrid Buffer Design with STT-MRAM for On-Chip Interconnects.

Hyunjun JangBaik Song AnNikhil KulkarniKi Hwan YumEun Jung Kim
Published in: NOCS (2012)
Keyphrases
  • design considerations
  • low cost
  • design process
  • physical design
  • case study
  • circuit design
  • neural network
  • user interface
  • computer aided
  • single chip
  • hybrid learning
  • cmos technology
  • programmable logic