Hardware implementation of a SHA-3 application-specific instruction set processor.
Mahmoud A. ElmohrMostafa A. SalehAhmed S. EissaKhaled E. AhmedMohammed M. FaragPublished in: ICM (2016)
Keyphrases
- instruction set
- application specific
- hardware implementation
- dedicated hardware
- general purpose
- efficient implementation
- signal processing
- memory management
- file system
- computation intensive
- field programmable gate array
- image processing algorithms
- parallel architecture
- level parallelism
- ibm power processor
- data mining
- memory subsystem
- general purpose processors
- high speed
- low cost