Complexity and Low Power Issues for On-chip Interconnections in MPSoC System Level Design.
Yuriy SheyninElena SuvorovaFelix ShutenkoPublished in: ISVLSI (2006)
Keyphrases
- low power
- single chip
- low power consumption
- high speed
- low cost
- cmos technology
- mixed signal
- power dissipation
- power consumption
- logic circuits
- ultra low power
- vlsi architecture
- gate array
- image sensor
- cmos image sensor
- nm technology
- wireless transmission
- vlsi circuits
- real time
- high power
- design process
- vlsi implementation
- design considerations
- low voltage
- multi channel
- hardware and software
- power reduction
- circuit design