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A double-quadrature down-conversion mixer in 0.18 μm SiGe BiCMOS process.

Jinna YanKok Meng LimJiangmin GuKeping WangWei Meng LimKaixue MaKiat Seng Yeo
Published in: ISOCC (2011)
Keyphrases
  • neural network
  • design process
  • multiscale
  • feature vectors
  • high speed