Pipelined Bus-Invert Coding for FPGAs Driving High-Speed DDR-Channels.

Günter Knittel

Published in: ITNG (2008)

Keyphrases

high speed
low power
coding scheme
high speed networks
frame rate
multi channel
real time
coding method
hardware implementation
data flow
field programmable gate array
computer vision
radon transform
parallel architectures