Dynamic Reconfigurable PUFs Based on FPGA.

Yijun Cui Chenghua Wang Yunpeng Chen Ziwei Wei Mengxian Chen Weiqiang Liu

Published in: SiPS (2019)

Keyphrases

hardware implementation
low cost
field programmable gate array
systolic array
digital signal
real time
data sets
information systems
decision trees
general purpose
data flow
single chip
parallel architecture
dedicated hardware