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Parallel and pipelined VLSI implementation of a staged decoder for BCM signals.

Giuseppe CaireJavier Ventura-TravesetJ. MurphySun-Yuan Kung
Published in: J. VLSI Signal Process. (1995)
Keyphrases
  • vlsi implementation
  • fir filters
  • vlsi architecture
  • signal processing
  • filter bank
  • associative memory
  • parallel computing
  • computer systems
  • data compression
  • distributed video coding