An approach for multilevel logic optimization targeting low power.

Sasan Iman Massoud Pedram

Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1996)

Keyphrases

low power
power consumption
logic circuits
high speed
low cost
delay insensitive
single chip
high power
wireless transmission
low power consumption
vlsi circuits
image sensor
mixed signal
power saving
power reduction
gate array
digital signal processing
real time