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A 2.4-GHz ring-oscillator-based CMOS frequency synthesizer with a fractional divider dual-PLL architecture.

Zhinian ShuKa Lok LeeB. H. Leung
Published in: IEEE J. Solid State Circuits (2004)
Keyphrases
  • high speed
  • management system
  • analog vlsi
  • real time
  • low cost
  • power consumption
  • low frequency
  • software architecture
  • low power
  • feedback loop
  • hurst exponent
  • data flow
  • cmos technology
  • cmos image sensor