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A Static Contention-Free Dual-Edge-Triggered Flip-Flop with Redundant Internal Node Transition Elimination for Ultra-Low-Power Applications.

Sekeon KimKeonhee ChoKyeongrim BaekHyunjun KimYounmee BaeMijung KimDongwook SeoSangyeop BaeckSungjae LeeSeong-Ook Jung
Published in: VLSI Technology and Circuits (2023)
Keyphrases
  • internal nodes
  • ultra low power
  • leaf nodes
  • flip flops
  • low power
  • power consumption
  • power dissipation