A Low-Power Hardware Accelerator for ORB Feature Extraction in Self-Driving Cars.
Raúl TarancoJosé-María ArnauAntonio GonzálezPublished in: SBAC-PAD (2021)
Keyphrases
- low power
- low cost
- feature extraction
- single chip
- vlsi architecture
- digital signal processing
- high speed
- power consumption
- low power consumption
- hardware and software
- field programmable gate array
- image sensor
- high power
- signal processor
- image processing
- parallel implementation
- gate array
- feature vectors
- embedded systems
- real time
- mixed signal
- digital camera
- wireless transmission
- hardware implementation
- logic circuits
- wavelet transform
- frequency domain
- power reduction
- vlsi circuits
- pattern recognition
- cmos technology
- vlsi implementation
- wireless communication