To implement positive feedback adiabatic logic (PFAL) - NAND technique on low power Zigbee applications for processor applications.
K. ParthibanS. SasikumarPublished in: Microprocess. Microsystems (2020)
Keyphrases
- low power
- positive feedback
- low power consumption
- single chip
- high speed
- logic circuits
- low cost
- gate array
- power consumption
- delay insensitive
- real time
- negative feedback
- digital signal processing
- vlsi architecture
- power reduction
- power dissipation
- cmos technology
- energy efficiency
- mixed signal
- vlsi circuits
- asynchronous circuits
- learning environment