Low-power high-speed on-chip asynchronous Wave-pipelined CML SerDes.
Ashok JaiswalDominik walkYuan FangKlaus HofmannPublished in: SoCC (2014)
Keyphrases
- low power
- high speed
- delay insensitive
- single chip
- mixed signal
- high power
- low power consumption
- cmos technology
- data flow
- wireless transmission
- signal processor
- image sensor
- vlsi circuits
- real time
- digital signal processing
- vlsi architecture
- logic circuits
- ultra low power
- power reduction
- asynchronous circuits
- frame rate
- power consumption
- gate array