FPGA acceleration on a multi-layer perceptron neural network for digit recognition.
Isaac WestbyXiaokun YangTao LiuHailu XuPublished in: J. Supercomput. (2021)
Keyphrases
- digit recognition
- neural network
- hand written
- noisy environments
- audio visual
- back propagation
- high speed
- artificial neural networks
- field programmable gate array
- support vector machine
- pattern recognition
- low cost
- hardware implementation
- neural network model
- data sets
- real time
- space time
- associative memory
- multiscale
- hardware architecture
- data mining