A novel high-speed approach for 16 × 16 Vedic multiplication with compressor adders.
Yogita BansalCharu MadhuPublished in: Comput. Electr. Eng. (2016)
Keyphrases
- high speed
- low power
- power dissipation
- power consumption
- digital signal processing
- floating point
- real time
- low cost
- programmable logic
- fixed length
- modular exponentiation
- frame rate
- machine learning
- multiple valued
- high speed networks
- arithmetic operations
- artificial neural networks
- relational databases
- multi agent systems
- pattern recognition
- database systems
- genetic algorithm
- bit parallel