Low-power high-speed performance of current-mode logic D flip-flop topology using negative-differential-resistance devices.
Taeho Ho KimYongsik JeongKyounghoon YangPublished in: IET Circuits Devices Syst. (2008)
Keyphrases
- low power
- high speed
- flip flops
- power dissipation
- cmos technology
- power consumption
- low voltage
- logic circuits
- low cost
- low power consumption
- high power
- single chip
- delay insensitive
- digital signal processing
- real time
- embedded systems
- power reduction
- vlsi circuits
- vlsi architecture
- frame rate
- image sensor
- wireless communication
- digital camera
- mixed signal
- modal logic
- low complexity
- gate array