Sign in
A power efficient 1.0625-3.125 Gb/s serial transceiver in 130 nm digital CMOS for multi-standard applications.
Zhongyuan Hou
Fan Yang
Junhua Liu
Xing Zhang
Published in:
Sci. China Inf. Sci. (2014)
Keyphrases
</>
power consumption
computationally expensive
high speed
low cost
circuit design
neural network
computationally efficient
power supply
silicon on insulator
low power
digital curves