A novel high performance low power CMOS NOR gate using Voltage Scaling and MTCMOS technique.
Ankish HandaJitesh ChawlaGeetanjali SharmaPublished in: ICACCI (2014)
Keyphrases
- low power
- cmos technology
- low voltage
- signal processor
- low power consumption
- power consumption
- high speed
- low cost
- nm technology
- single chip
- energy dissipation
- wireless transmission
- digital signal processing
- mixed signal
- high power
- vlsi architecture
- vlsi circuits
- power dissipation
- random access memory
- logic circuits
- gate array
- power management
- cmos image sensor
- image sensor
- power system
- image processing
- delay insensitive