High speed Fp multipliers and adders on FPGA platform.

Santosh Ghosh Debdeep Mukhopadhyay Dipanwita Roy Chowdhury

Published in: DASIP (2010)

Keyphrases

high speed
real time
low power
frame rate
programmable logic
data acquisition
field programmable gate array
multiple valued
high speed networks
data sets
hardware implementation
platform independent
reconfigurable hardware