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Systolic algorithms and a memory-based design approach for a unified architecture for the computation of DCT/DST/IDCT/IDST.

Doru-Florin ChiperM. N. Shanmukha SwamyM. Omair AhmadThanos Stouraitis
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2005)
Keyphrases
  • discrete cosine transform
  • computation intensive
  • low power
  • image compression
  • efficient implementation
  • dct coefficients
  • low cost
  • power consumption