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High Performance Asynchronous ASIC Back-End Design Flow Using Single-Track Full-Buffer Standard Cells.
Marcos Ferretti
Recep O. Ozdag
Peter A. Beerel
Published in:
ASYNC (2004)
Keyphrases
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back end
detailed design
building blocks
design methodology
user friendly
design process
data types
application specific
high level synthesis
data sets
integrated circuit
design tools
single chip
manufacturing cell