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Exploring one-sided communication and synchronization on a non-cache-coherent many-core architecture.
Steffen Christgau
Bettina Schnor
Published in:
Concurr. Comput. Pract. Exp. (2017)
Keyphrases
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multithreading
communication protocols
management system
communication protocol
software architecture
communication systems
command and control
real time
communication channels
interprocess communication
data acquisition
main memory
memory access
hit rate
memory hierarchy
memory subsystem