Architecture and Implementation of a Low-Power LVDS Output Buffer for High-Speed Applications.
Vladimir BratovJeb BinkleyVladimir KatzmanJohn ChomaPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2006)
Keyphrases
- low power
- high speed
- vlsi architecture
- cmos technology
- low cost
- signal processor
- power consumption
- real time
- high power
- ultra low power
- single chip
- digital signal processing
- wireless transmission
- nm technology
- logic circuits
- low power consumption
- vlsi circuits
- frame rate
- efficient implementation
- focal plane
- circuit design
- design methodology
- cmos image sensor