FPGA-Based Hardware Accelerator for Matrix Inversion.
Venkata Siva Kumar KokkiligaddaVijitha NaikotiGaurao Sunil PatkotwarSamrat L. SabatRangababu PeesapatiPublished in: SN Comput. Sci. (2023)
Keyphrases
- matrix inversion
- field programmable gate array
- hardware implementation
- hardware architecture
- monte carlo
- embedded systems
- hardware design
- least squares
- processing elements
- parallel computing
- image processing algorithms
- computational cost
- computing systems
- kernel matrix
- efficient implementation
- parallel architectures
- signal processing
- policy evaluation
- learning algorithm
- computer systems
- support vector
- feature extraction