Concurrent Symbol Processing Capable VLSI Architecture for Bit Plane Coder of JPEG2000.
Amit Kumar GuptaSaeid NooshabadiDavid TaubmanPublished in: IEICE Trans. Inf. Syst. (2005)
Keyphrases
- bit plane
- low complexity
- vlsi architecture
- arithmetic coder
- bit planes
- image coding
- image coder
- motion estimation
- mode decision
- computational complexity
- distributed video coding
- rate distortion
- real time
- bitstream
- transform domain
- wavelet coefficients
- coding method
- probability model
- vlsi implementation
- low power
- bit rate
- video compression
- image coding algorithm
- subband
- computationally efficient
- denoising
- feature space
- feature extraction
- computer vision