The Design of a Low-Power Asynchronous DES Coprocessor for Sensor Network Encryption.
Yijun LiuPinghua ChenGuobo XieZhusong LiuZhenkun LiPublished in: ISCSCT (2) (2008)
Keyphrases
- low power
- sensor networks
- single chip
- power consumption
- wireless sensor networks
- low cost
- high speed
- energy efficiency
- low power consumption
- sensor data
- vlsi architecture
- logic circuits
- energy consumption
- cmos technology
- resource constrained
- digital signal processing
- energy efficient
- gate array
- power dissipation
- data sets
- sensor nodes
- base station
- communication cost
- power reduction
- delay insensitive
- key management
- data streams
- real time
- ultra low power