Low-power video decoding system using a reconfigurable processor.
Joon Ho SongWonchang LeeDoo Hyun KimDo-Hyung KimShihwa LeePublished in: ICCE (2012)
Keyphrases
- low power
- low cost
- single chip
- high speed
- high definition television
- gate array
- power consumption
- power reduction
- real time
- low power consumption
- video decoder
- video data
- high power
- video content
- digital signal processing
- video streams
- logic circuits
- image sensor
- video sequences
- hardware and software
- cmos technology
- vlsi circuits
- low density parity check
- digital camera
- power dissipation
- image processing
- vlsi architecture
- mixed signal
- dynamic scenes
- parallel processing