Sparsity-Aware Clamping Readout Scheme for High Parallelism and Low Power Nonvolatile Computing-in-Memory Based on Resistive Memory.
Linfang WangWang YeJunjie AnChunmeng DouQi LiuMeng-Fan ChangMing LiuPublished in: ISCAS (2021)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- low power consumption
- high power
- single chip
- wireless transmission
- memory bandwidth
- logic circuits
- computational power
- power dissipation
- vlsi architecture
- parallel processing
- digital signal processing
- real time
- storage devices
- main memory
- vlsi circuits
- cmos technology
- massively parallel
- level parallelism