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Design of a High Speed, Low Latency and Low Power Consumption DRAM Using two-transistor Cell Structure.

Amin ChegeniKhayrollah HadidiAbdollah Khoei
Published in: ICECS (2007)
Keyphrases
  • high speed
  • low power
  • low power consumption
  • low latency
  • low cost
  • real time
  • single chip
  • power consumption
  • data acquisition
  • data processing
  • highly efficient